A novel scalable dual basis GF(2m) multiplier architecture

Modern mobile communications and Internet transactions heavily rely on cryptosystems to ensure their security. These cryptosystems such as ECDSA usually rely on arithmetic operations over finite field GF(2m). The most important arithmetic operation is multiplication, thus leading to the high demand for design of efficient multiplier. In this paper, based on the Hankel matrix-vector representation of dual basis multiplication, a novel low-complexity scalable digital circuit architecture for dual basis GF(2m) multiplication is derived and proposed. This scalable architecture adopts most significant digit (MSD) first scheme and can perform m-bit multiplications with substantially smaller d-bit digits, and thus is feasible for implementing ECC cryptosystems such as ECDSA in resource-constrained environments such as embedded systems and smart cards. Analytical results exhibit that both area and time-area complexities of the proposed scalable architecture are substantially lower than those of the non-scalable architectures. Moreover, due to its features of regularity, modularity and concurrency, the proposed architecture is highly promising for VLSI implementations.